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CPU cache
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41	cs281: Introduction to Computer Systems Project Lab: The Cachelab – Simulating a Cache Controler Distributed: Monday, Nov. 30, Due: Monday, Dec. 7 at midnight Introduction Add to Reading List Source URL: personal.denison.edu Language: English - Date: 2015-11-30 11:25:52 Software Computing Computer programming Cache Computer memory Computer architecture CPU cache Central processing unit Valgrind Memory leak
42	Hybrid Scheduling for Parallel Rendering using Coherent Ray Tasks Erik Reinhard University of Bristol Alan Chalmersy University of Bristol Add to Reading List Source URL: www.cg.its.tudelft.nl Language: English - Date: 2007-08-03 10:29:22 Concurrent computing Parallel computing Computing Data parallelism Rendering CPU cache Ray tracing Cell Data Parallel algorithm SIMD Scheduling
43	Improving Memory Subsystem Performance using ViVA: Virtual Vector Architecture Joseph Gebis12 ,Leonid Oliker12 , John Shalf1 , Samuel Williams12 ,Katherine Yelick12 1 CRD/NERSC, Lawrence Berkeley National Laboratory Ber Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-06 23:57:27 Computing Computer engineering Computer architecture Parallel computing Central processing unit Cache Computer memory CPU cache Vector processor Memory access pattern Memory hierarchy Processor register
44	Monitoring Performance and Power for Application Characterization with the Cache-aware Roofline Model Diogo Ant˜ao, Lu´ıs Tani¸ca, Aleksandar Ilic, Frederico Pratas, Pedro Tom´as, and Leonel Sousa INESC-ID / Institu Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2015-03-03 11:08:46 Computer architecture Computing Computer engineering Concurrent computing Central processing unit Thread Scheduling Kernel Roofline model CPU cache Multi-core processor ARC
45	Lecture 16: Threads William Gropp www.cs.illinois.edu/~wgropp Add to the (Model) Architecture Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-02-14 13:47:30 Computing Computer hardware Computer engineering Computer architecture Central processing unit Parallel computing Cache Computer memory CPU cache Multi-core processor Manycore processor Multithreading
46	Using Offline Bitstream Analysis for Power-Aware Video Decoding in Portable Devices Yicheng Huang Samarjit Chakraborty Add to Reading List Source URL: www.smcnus.org Language: English - Date: 2013-09-27 01:18:39 Computing Computer architecture Central processing unit Computer hardware Microprocessors Video acceleration Parallel computing Multi-core processor Microarchitecture CPU cache Frequency scaling
47	Performance Portable Optimizations for Loops Containing Communication Operations Costin Iancu Wei Chen, Katherine Yelick Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-10-24 14:34:01 Computing Software engineering Compiler optimizations Computer programming Loop optimization Automatic parallelization Loop nest optimization CPU cache Program optimization Software pipelining Granularity Lookup table
48	Peer Quiz Design of Parallel and High-Performance Computing Fall 2014 Lecture: Cache Coherence & Memory Models Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2014-10-12 15:57:01 Cache coherency Computing Concurrent computing Computer hardware MESI protocol CPU cache MOESI protocol Cache MSI protocol Draft:Cache memory Consistency model Write buffer
49	Modeling set associative caches behavior for irregular computations Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2014-12-23 06:07:47 Algebra Mathematics Vectors Vector calculus Linear algebra Cache Matrix Euclidean vector CPU cache Sparse matrix Square matrix Cross product